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NI序列号Serial Number生成激活工具NI License Activator，LabVIEW/VBAI/VDM/VAS等软件模块工具包破解工具不限版本
http://pcmv.cn/thread-490-1-1.html
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文件Hash计算器FHash,文件校验和验证下载文件正确性验证，MD5值计算、SHA1值计算、SHA256值计算、CRC32值计算
http://pcmv.cn/thread-26524-1-1.html
NI Circuit Design Suite 12.0.1 Pro Win32Eng/Ger/Jpn NI电路设计套件12.0.1专业版
Circuit Design Suite(CDS)电路设计套件
电路设计套件结合了Multisim和Ultiboard软件，为电路设计、仿真、验证和布局提供了一套完整的工具。
电路设计套件为您提供了直观且经济高效的设计电路工具。您可以执行交互式SPICE仿真并无缝转换到PCB布局和布线软件。该套件专为教学、科研和设计而开发，提供了先进的仿真功能，可以让您清楚地了解电路在各种场景下的性能。
12.0.1Pro
zip
文件大小: 637949182 字节 (608.40 MB)
修改日期: 2019-06-25 02:41
MD5: d9e06f7172d9d9fcaf8f50d22f87ffbb（官方正确）
SHA1: 87f5918b2ed29a617a411ad0bf1ba34e95d56755
SHA256: 95bafe0878b734e507cf15b593dfd3a5203dfbf58302d56b838c2d68eabf86e7
CRC32: 3bb1672f
exe
文件大小: 638544584 字节 (608.96 MB)
修改日期: 2012-08-24 10:31
MD5: e579dc1f5bb077c24898e9fc97ccf016
SHA1: 2816328594a56917d83587d6554c39d7396f983a
SHA256: b9565a8494bbe799ce6e8cabf1ff2a5c3558dcd5d87b8bdbdda8bad4289c18cd
CRC32: 060a8877
百度网盘与NI官方下载地址：
NI Circuit Design Suite 12.0.1 Pro Win32Eng/Ger/Jpn NI电路设计套件12.0.1专业版
http://pcmv.cn/thread-26711-1-1.html?fromuid=9
(出处: 机器视觉论坛)
NI Circuit Design Suite 12.0.1 Readme for Windows
Supported Platforms
Installing Circuit Design Suite 12.0.1Installing Multiple Versions
Archiving Circuit Design Suite databases
Uninstalling
Known IssuesLabVIEW
LabVIEW functionality (LabVIEW instruments and grapher interpolation) will not work if the installation path uses characters that are not native to the "Language for non-Unicode programs" setting, available by selecting Start»Control Panel»Regional and Language Options and selecting the Advanced tab. In the Vista OS, use the "Current language for non-Unicode programs:" setting in the Administrative tab. LabVIEW functionality works for Unicode characters that are native to this setting.
Windows Vista
You cannot install Circuit Design Suite 12.0.1 on Windows Vista Starter edition.
Circuit Design Suite
In Pentium III machines, NI Multisim cannot load LV Instruments created in NI LabVIEW 2011 and 2012; this also affects LVM and TDM sources and export, and the COM API method to capture a circuit image. This is due to the use of SSE2 optimizations in LV Application Builder when LabVIEW components used in Multisim were compiled. For more information, please read KB 60CCP0XL: I Get LV-related Error Messages When Opening Multisim in a Pentium III Machine.
Multisim and Ultiboard leak GDI resource handles when used over extended periods of time, eventually leading to unpredictable user interface behavior and crashes. This is an issue with MFC applications running on Windows XP SP2 and Windows Server 2003. For more information and workarounds, refer to KB 4JREGSXL:Multisim or Ultiboard Leaking GDI Resource Handles.
The Multisim Buzzer component will not generate any sound in Windows Vista 64-bit edition. This is due to Microsoft not supporting use of the Beep function in that version of Windows. The Beep function is used by this component to generate sound.
The upgrade to the PICC 9.82 (pro) compiler in Circuit Design Suite 12.0.1 may break existing code in MCU files since macros used by the compiler have changed. For example, WDTEN has been replaced with WDT_ON, and OPTION has been replaced by OPTION_REG.
Bug Fixes
| Multisim ( 77 ) | |
| Bug ID | Description |
| 365744 | Changing the direction of a PLD connector from the co-simulation view will sometimes crash Multisim. |
| 363133 | Expand/collapse tree items in Rename/Renumber dialog may crash in some cases. |
| 363087 | ADG802BCBZ-REEL7 and ADG819BCB do not transfer to Ultiboard correctly. |
| 361071 | Undocking virtual serial terminal VTERM window causes crash in some cases. |
| 360449 | Power variable should not appear in the analysis variables list. |
| 359999 | Placing a PLD custom configuration file as a subcircuit will sometimes crash Multisim. |
| 359154 | Locking subcircuits does not prevent the design preview to show contents. |
| 358846 | PLD connectors don't connect when placed on wire/pin. |
| 351410 | When loading an MS12 file, the saved "Probe Properties" are not restored. |
| 350888 | Non_Ideal_Battery missing in Pro Versions of Multisim. |
| 350611 | Loading Multisim version 6 or version 7 files with multisection components crashes Multisim. |
| 350584 | Placing a Hierarchical Block Outside the Design Sheet Boundary Crashes Multisim. |
| 349472 | The symbol for 74LS48 incorrectly shows active low pins. |
| 349258 | Simulation throws errors found by the netlist generator after using the In Use List. |
| 348533 | Right-click does not cancel wiring unless the first junction has been placed/connected. |
| 348103 | Some long equation models may cause simulator failures. |
| 347337 | Thermal noise source doesn't accept values from the dialog. |
| 347242 | Symbol Pins Landing Off The Grid Create Uneven Wire Connections. |
| 346778 | Pulse current source not generating correct output in some cases. |
| 345953 | INA111AU and INA111BU have incorrect footprint assigned. |
| 345470 | ThreePhaseInverter sample circuit throws convergence error in interactive simulation. |
| 345217 | Loading PSpice exported CIR files in Multisim crashes Multisim in some cases. |
| 344083 | Opening NI ELVIS II Design crashes Multisim in some cases. |
| 343779 | Noise analysis is generating incorrect spice statement. |
| 342877 | New wire names are in random order when using drag drop a component to link a set of pins. |
| 342841 | Incorrect pin assignment in the NI-sbRIO-9605 and NI-sbRIO-9606 symbols. |
| 342692 | Remap 2000+ components that are linked to Footprints with the Ultiboard Pinout field populated. |
| 341809 | Update Components will not update certain information unless the Symbol checkbox is checked. |
| 337864 | Footprint pins should not auto-populate in Edit Component dialog. |
| 337423 | Multisim crashes on disconnect after creating a BOM using the Multisim COM API. |
| 337393 | False Positive Errors when Parsing in the Edit Model dialog |
| 335504 | Time delayed switch gives incorrect results. |
| 335308 | List box in component properties does not behave as expected. |
| 335288 | Autowire component on move list box in the Global preferences allows for invalid values to be entered. |
| 334342 | Selection snippets with post-it notes opened as design snippets through external COM crash Multisim. |
| 332480 | SN74123D gets convergence error when both sections are in use. |
| 332429 | Multisim simulation time drifts relative to LabVIEW simulation time when using the LabVIEW Co-Simulation plugin. |
| 329918 | Disable SPICE netlist viewing when the circuit restriction to hide component values is enabled. |
| 329871 | Interactive simulation settings ignored on first run following a transient simulation. |
| 329492 | Relay doesn't behave as expected in some cases. |
| 328669 | Grid does not appear in Multisim for some magnifications. |
| 327944 | Adding spaces before component names using Multisim's component search yields no results. |
| 326744 | Multi-select deleting empty rows in digital Grapher doesn't delete the selections. |
| 326727 | Buses are merged incorrectly on opening the design in some cases. |
| 326217 | The footprint mapping for the MCT6 pin 3 and 4 are reversed. |
| 326102 | L64211* components have bad mappings and land pattern. |
| 325947 | Deleting a wired up component causes net names to get mixed up in some cases. |
| 325904 | Horizontal Buses Cannot Move Sideways On First Click. |
| 325881 | Multisim leaks memory when opening a Multisim 7 file. |
| 324690 | PLD designs cannot be closed using File->Close on the top level page unless all other child pages are closed. |
| 324614 | Aligning parts with wires sometimes aligns them to the edge of the design. |
| 322674 | Some components sometimes may share symbols with Rated components causing multiple drawing layers when editing the symbol |
| 321970 | F1 doesn't go to the right topic for the text block. |
| 321715 | Automatic wiring produces scrambled paths when connections are too close. |
| 319775 | ERC doesn't flag errors with pins on a single component. |
| 318565 | Using Undo after searching the component browser will not restore the browser to the previously selected family and group. |
| 317110 | Pressing the Escape key In Component Wizard Quits Without Prompting. |
| 315848 | "Auto Resize" changes comments so that they are cut off. |
| 314297 | Short Fault does not allow more than 2 shorted connections. |
| 313574 | Digital Clock and Digital Ground do not work together in purely digital circuits. |
| 309298 | The 74123 does not work as expected. |
| 307083 | LM117HVH does not function as expected. |
| 301516 | The schematic symbol for the NDS8858H is incorrect. |
| 296710 | Multisim is slow when wiring to a component with high pin count. |
| 288052 | Control_1C relay no longer works in Multisim 11.0 |
| 284733 | Multisim reports an error when placing the LCD_DISPLAY_08x1 component. |
| 275327 | Nets are not properly connected across multipages when back annotating in some cases. |
| 275136 | Copying and pasting subcircuit/hierarchical block should preserve page order. |
| 274870 | Dummy pin names showing up for connectors. |
| 274855 | Hiding the symbol names and adding new connectors in a sub-circuit changes the sub-circuit connector's name. |
| 274775 | Canceling the action to create a floating wire on schematic, will leave a floating junction behind. |
| 274530 | Multisim leaves junctions behind if user cancels place wire command. |
| 274382 | Reports incorrectly show component values with the component values circuit restrictions enabled. |
| 273963 | Adding components to database when importing from orcad does not immediately show. |
| 273544 | "Highlight Selection in Ultiboard" brings all Multisim and Ultiboard windows to the foreground. |
| 272380 | Multisim allows creating zero length busses in some cases. |
| 222209 | Unable to create POWER SOURCE symbols that can be simulated. |
| Ultiboard ( 73 ) | |
| 361847 | Keep-in Area Over Copper Area Crashes Ultiboard. |
| 357562 | Right-click Context Menu In Gerber Viewer does not work as expected. |
| 354078 | Ultiboard crashes by moving an object after deleting a group in some cases |
| 352489 | Polyline to Polygon conversion during DXF Import causes Ultiboard to hang. |
| 348652 | Narrow Trace and Follow Me router crashes Ultiboard in some cases. |
| 348599 | Rotating a Component during placement causes Ultiboard to Hang. |
| 346797 | Custom Pad Shape Used In New Part Not Selectable in Soldermask and Pastemask Layers Active. |
| 346796 | Resizing custom pad shape does not redraw correctly. |
| 346754 | Deleting a Part In Ultiboard Triggers a DRC Error And The Part Is Not Deleted From Netlist. |
| 344199 | Ultiboard DXF Export for Bottom Layers cannot be opened in AutoCAD 2012. |
| 342978 | Copy and paste a jumper or testpoint does not automatically increment the RefDes. |
| 341672 | Ultiboard becomes unstable after placing a custom netbridge pin. |
| 341563 | Place Pin dialog has length and width reversed. |
| 341545 | 3D Pad Data is incorrect when rotated in increments of 45 degrees. |
| 340688 | Ultiboard crashes when placing certain objects and clicking elsewhere in some cases. |
| 339662 | Ultiboard does not display custom pads correctly in some cases. |
| 337306 | DXF import does not import line thickness correctly in some cases. |
| 336065 | Third-party DXF viewers unable to view Ultiboard DXF exports that contain certain types of text attributes. |
| 336035 | 3D View incorrectly allows selecting active layer |
| 334850 | Placing a pin on a newly created PCB part will crash Ultiboard. |
| 333422 | Creating a new project does not close Recent view in some cases. |
| 331606 | SMT pin properties does not show custom pad preview correctly in some cases. |
| 330536 | IPC 356A netlist generates incorrect coordinates for custom pads. |
| 329698 | Silkscreen top and bottom graphics disappear when opened using Ultiboard v12.0 if the ' enable 3d for this object ' option was set. |
| 329362 | Through Hole Pin Properties layer selection and design toolbox active layer do not match. |
| 328327 | User being prompted to re-specify 3D font rendering if they change unrelated 3D settings. |
| 328214 | Automatic spoke generation in thermal relief has changed in version 12.0. |
| 327921 | Ultiboard does not mark a file as changed after loading a technology file. |
| 327524 | The option to ask for formation on DRC when adding teardrop to a design will ask for confirmation on every teardrop created. |
| 327159 | Pasting polygons into layers that don't exist produces voiding error messages. |
| 326743 | "Part Spacing Bottom" value in Part Group Settings has no effect on part spacing. |
| 326339 | Board Outline Problem Dialog Allows Input of Negative Numbers. |
| 326282 | Board outline fix doesn't indicate success or failure. |
| 326082 | The Shield net column in the Spreadsheet Nets tab does not behave as expected. |
| 325850 | Pads Not Displayed in Database If Copper Top Layer Is Turned Off. |
| 325103 | Ultiboard view does not jump to the plane when clicking on the net connected to the place in the spreadsheet. |
| 324241 | Trace-Length-Check in Ultiboard does not work in some cases. |
| 323407 | Advanced holes are not displayed in Ultiboard 3D view. |
| 323405 | Pin with "Advanced Holes" do not properly display the hole size. |
| 321475 | 3D Preview leaks memory when it is docked. |
| 321437 | Part settings revert back after cancelling group editor dialog. |
| 321212 | The Test Point reference ID should be on by default. |
| 321206 | Moving a pie object show the full object instead of the outline. |
| 320813 | The autorouter results output in the spreadsheet does not use the system locale when displaying the date and time. |
| 320663 | Text Tool Is Disabled When Active Layer Is Solder Mask or Paste Mask. |
| 320243 | Fanout dialog allows the creation of invalid vias. |
| 319790 | Changing layers in the THT pad property dialog's pad tab, will change layers in the main design. |
| 319057 | Default width for many spreadsheet columns is too narrow. |
| 313500 | Copper areas tab does not auto-apply settings in spreadsheet view. |
| 307943 | Added DONOTANNOTATE attribute by default to netbridges, jumpers and test points. |
| 289732 | Ultiboard does not behave as expected when saving a modified part back into a user or corporate database. |
| 286008 | Trace length on the Spreadsheet view and High Speed DRC doesn't match. |
| 279770 | Jumpers Show As Unrouted Connections In Statistics Tab. |
| 279098 | Ultiboard allows creating invalid rectangles in some cases. |
| 278180 | Unable to unlock a net using the spreadsheet in some cases. |
| 275646 | In-Place Part edit allows you to irreversibly remove RefDes attribute. |
| 275307 | Find the selected net zooms to fit all pins/pads on net instead of net. |
| 275284 | Trace drawing mode is incorrectly activated after test point is dropped. |
| 274919 | Pin/pad of locked test point can be moved. |
| 274641 | Connectivity Check cannot ascertain RefDes of components in groups. |
| 274520 | Partially drawn copper area doesn't redraw properly if switching to a different tool. |
| 274412 | Errors are reported when saving a newly created netbridge whose pins are connected by an ellipse. |
| 274059 | Ultiboard incorrectly allows for attributes with duplicate tags in some cases. |
| 273347 | Select Width combo box does not contain any values after Ultiboard returns from Full Screen mode. |
| 273346 | Importing Ultiboard 5 net file cannot handle spaces in the name. |
| 273234 | Deleting a polygon vertex can create invalid shape in some cases. |
| 271327 | "Convert Closed Objects To Filled" Is Not Working in some cases. |
| 271315 | The 3D preview of a component changes incorrectly when the component is rotated on the design. |
| 271298 | Spheres attached to Ultiboard components do not get mirrored when component is placed on board bottom. |
| 266662 | Locked jumper gets pulled off the board when you start auto-routing. |
| 266537 | Clearances for small circular objects are not drawn correctly. |
| 346755 | Forward Annotation Fails to Detect That A Part Has Been Deleted in Ultiboard. |
| 275657 | In spreadsheet, clicking on column header while in-place edit is active effects the whole column. |
| 327522 | After transferring a design from Multisim to Ultiboard, multiple clearances are displayed in the Parts tab when they are disabled in the default Design Rules settings. |
| 333752 | Undoing position settings changes crashes Ultiboard. |
| 344558 | Multisim is tranferring a net assigned to a simulation only pin which will generate a DRC error in Ultiboard. |
New Components
Infineon Models
Automating the Installation of NI Products
For more information on silent installations of individual NI products, refer to KB 4CJDP38M, Automating the Installation of a Single Installer.
For more information on silent installations of suited NI products, such as NI Developer Suite, refer to KB 4GGGDQH0, Automating the Installation of a Suited Installer.
To determine what version of NI Installers your product contains, refer to KB 4CJDR18M, How Can I Determine the Type and Version of My National Instruments Installer?.
Copyright
Notices are located in the <National Instruments>_Legal Information and <National Instruments> directories.
EULAs are located in the <National Instruments>SharedMDFLegallicense directory.
Review <National Instruments>_Legal Information.txt for information on including legal information in installers built with NI products.
Trademarks
Patents