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NI序列号Serial Number生成激活工具NI License Activator，LabVIEW/VBAI/VDM/VAS等软件模块工具包破解工具不限版本
http://pcmv.cn/thread-490-1-1.html
视觉论坛的各种资源，除了视觉相关的模块有使用外，大部分的都不会使用，所以仅提供资源不能提供技术支持。资源的下载地址一般会同时提供NI官方地址和百度网盘的下载地址。某些工具包NI的地址失效或没有NI的下载地址，那视觉论坛也没有办法，只能尝试使用百度网盘地址下载；如果百度网盘的下载地址失效过期，可联系论坛客服更新。现在NI的下载服务器对我国IP地址不是很友好，有些时候速度很慢或大的资源下载很容易出错，这样会造成安装过程各种类型报错而无法安装。建议在下载完成后，对下载资源做校验和验证（NI一般会提供MD5或SHA256等），与官方或视觉论坛提供的校验和对比，一致就可以安装，如果不一致，则需要重新下载。视觉论坛早期下载的资源，那时候NI没有这么多限制，基本上都是正常下载的资源；后期下载的资源，都与NI的正确校验和对比过，保证是正确的资源才上传到百度网盘，所以百度网盘的资源基本上是正确的。校验和工具下载地址：
文件Hash计算器FHash,文件校验和验证下载文件正确性验证，MD5值计算、SHA1值计算、SHA256值计算、CRC32值计算
http://pcmv.cn/thread-26524-1-1.html
NI Circuit Design Suite 11.0.1 Pro Win32Eng/Ger/Jpn NI电路设计套件11.0.1专业版
Circuit Design Suite(CDS)电路设计套件
电路设计套件结合了Multisim和Ultiboard软件，为电路设计、仿真、验证和布局提供了一套完整的工具。
电路设计套件为您提供了直观且经济高效的设计电路工具。您可以执行交互式SPICE仿真并无缝转换到PCB布局和布线软件。该套件专为教学、科研和设计而开发，提供了先进的仿真功能，可以让您清楚地了解电路在各种场景下的性能。
11.0.1Pro
文件大小: 487004768 字节 (464.44 MB)
修改日期: 2010-09-16 01:07
MD5: 5d9b13016d567daf4dabf2ee25dc6471
SHA1: 953a8c2895879385beb45db908c4aa9edb4ec7fb
SHA256: adcc003d582d2b847aa94e0c0ef2f08914bed02799955f839b1c7dfa087db461
CRC32: 9a58cd88
百度网盘与NI官方下载地址：
NI Circuit Design Suite 11.0.1 Pro Win32Eng/Ger/Jpn NI电路设计套件11.0.1专业版
http://pcmv.cn/thread-27088-1-1.html?fromuid=9
(出处: 机器视觉论坛)
NI Circuit Design Suite 11.0.1 Readme for Windows
Supported Platforms
Installing Circuit Design Suite 11.0.1Installing Multiple Versions
Installing Circuit Design Suite Silently
Archiving Circuit Design Suite databases
Uninstalling
Known IssuesLabVIEW
LabVIEW functionality (LabVIEW instruments and grapher interpolation) will not work if the installation path uses characters that are not native to the "Language for non-Unicode programs" setting, available by selecting Start»Control Panel»Regional and Language Options and selecting the Advanced tab. In the Vista OS, use the "Current language for non-Unicode programs:" setting in the Administrative tab. LabVIEW functionality works for Unicode characters that are native to this setting.
Windows Vista
You cannot install Circuit Design Suite 11.0.1 on Windows Vista Starter edition.
Circuit Design Suite
Multisim and Ultiboard leak GDI resource handles when used over extended periods of time, eventually leading to unpredictable user interface behavior and crashes. This is an issue with MFC applications running on Windows XP SP2 and Windows Server 2003. For more information and workarounds, refer to KB 4JREGSXL:Multisim or Ultiboard Leaking GDI Resource Handles.
The Multisim Buzzer component will not generate any sound in Windows Vista-64 bit and on Windows XP-64 bit. This is due to Microsoft not supporting use of the Beep function in those versions of Windows. The Beep function is used by this component to generate sound.
Push button double-pole single-throw switches can cause convergence errors if any of their pins are left unwired. To avoid these convergence errors, connect any of the remaining unused pins to ground.
Node names containing '/', '' and '+' will not work in the Postprocessor. You can work around this by ensuring that your net names have preferred names that do not use those characters.
Release Notes
Circuit Design Suite Release Notes 11.0.1 state that the Forward Annotation and Backward Annotation dialogs have two new buttons called "Go to next conflict" and "Go to previous conflict". These are actually called "Jump to next conflict" and "Jump to previous conflict".
Bug Fixes
| Multisim ( 112 ) | |
| Bug ID | Description |
| 108322 | Cannot click finish in MCU wizard if the project type is load external hex file. |
| 109518 | Two layers can improperly end up with the same layer name in some cases. |
| 111245 | The pin mapping for the VGM96VC is incomplete. |
| 111336 | Undo and Redo menu items are not translated in the Symbol Editor / Title Block Editor. |
| 111614 | Convergence Assistant doesn't use LabVIEW or ELVIS instruments. |
| 112376 | Printing an instrument over a wireless network takes a long time in some cases. |
| 112563 | Word generator properties window resizes itself when changing display format. |
| 112599 | Rated LEDs have unrealistic parameters. |
| 113343 | The Temperature parameter in the resistor property pages does not validate out-of-range values correctly in some cases. |
| 113500 | Agilent function generator does not model 50 ohm output impedence correctly. |
| 113509 | Agilent oscilloscope vertical zoom can go up to 1nV/div. |
| 114056 | Goto location generated by confirming virtual connection is static. |
| 114477 | Footprint mapping for ADG413BRZ is incorrect. |
| 114874 | spreadsheet results tab go to arrows are out of sync with the circuit after a replace by HB operation. |
| 114972 | The shortcut key Ctrl-F does not open the find dialog window in the Description box editor. |
| 115056 | Analysis dialog should not allow selecting duplicate device/model parameters. |
| 115143 | Labview intrument Signal Analyzer is not saving Interpolation Method. |
| 115148 | Labview Microphone doesn't save or copy its Sample Rate setting. |
| 115833 | Schematic does not refresh correctly after closing the symbol/title block editor. |
| 115869 | Moving a group of components where no autowire is needed still causes autowiring. |
| 115936 | Multisim allows renaming components when the schematic is read only. |
| 115938 | Nets can be renamed if the read-only property is set on the schematic. |
| 115942 | Disabling Instruments toolbar in Circuit Restrictions prevents components from being placed from In-use list. |
| 115960 | MOSFET DEFAS instance parameter not saved. |
| 115985 | GRAPH_LCD* Display components are almost impossible to read given the color choices. |
| 116077 | Refdes with underscores truncated after cut and paste. |
| 116222 | PWL source does not generate error if external file does not exist. |
| 116241 | Deleting a model from the User database eventually causes error in "Edit Model" dialog. |
| 116247 | Integration method is being translated before passed to simulator. |
| 116277 | Lock Subsheets option disables Copy and Cut tasks. |
| 116336 | Forward annotating does not remove unused component after change to multisection component. |
| 116395 | Bus IO and offpage connectors do not stay connected to bus after rotating. |
| 116422 | Oscilloscope Trigger Type Buttons names are truncated. |
| 116486 | Connecting a component to pins in Ultiboard will not correctly backannotate when it is in a hierarchical block. |
| 116517 | The function generator instrument does not respect setting changes made during simulation when connected in certain configurations. |
| 116520 | Function generator LabVIEW instrument repeat button is broken. |
| 116539 | Instance footprint mapping does not update schematic. |
| 116559 | Physical constants return zero for analyses. |
| 116587 | Moving component in Database Manager changes component name. |
| 116625 | Disabling the NI ELVISmx Arbitrary Waveform Generator output signal while simulating will crash multisim. |
| 116631 | Connector name should be allowed to be the same as another component. |
| 116634 | dBm Measurement in the Spectrum Analyzer is incorrect. |
| 116637 | Naming an on-page connector with the same name a component had when placed can mess up the reference descriptor. |
| 116671 | Netlist report doesn't display the sections of multisection components. |
| 116675 | Changing net on hidden pin connection through spreadsheet causes prompt to rename all things on the net. |
| 116690 | Find information can yield incorrect behaviour after deleting and placing components. |
| 116693 | Cannot set hidden pin connections in spreadsheet. |
| 116695 | Hidden pins become out of sync using the gate optimizer. |
| 116696 | OPC connector names on multi-page not being updated. |
| 116712 | Importing a ms10 circuit containing multi-section component does not work correctly in some cases. |
| 116716 | Simulation settings not being imported correctly if set to disabled. |
| 116718 | Undoing with subcircuits does not work as expected. |
| 116724 | Connecting a net with an existing onpage to a hidden pin will create a floating on-page connector and will not actually connect to the hidden pin. |
| 116726 | Overwriting common hierarchical block on save when upgrading schematic crashes Multisim. |
| 116768 | Search Fails In the Component Browser When Used From the Component Wizard. |
| 116771 | Replace By Subcircuit Creates Unnecessary I/O Pins. |
| 116776 | 74LS11D IC has an error in symbol model mapping. |
| 116779 | RefDes drops leading zeroes. |
| 116801 | There is no prompt to save changes when exiting the Description box edit view. |
| 116805 | Multiple sections of a multi-section component can have inconsistent refdes.. |
| 116806 | Different sections of a single component can be mistaken for two components by BOM. |
| 116807 | Component properties are not synchronized properly when sections have different cases for refdes. |
| 116837 | RefDes change is not backannotated if component is not present in any of the component databases. |
| 116845 | Dragging selection disconnects bus wires. |
| 116846 | Colour of nets in a locked schematic can still be modified. |
| 116856 | The ~ symbol leading a net name causes the SPICE parser to fail. |
| 116867 | Undo of any action on main design messes up refdeses of components inside subcircuit. |
| 116873 | Hidden pin information gets wiped out after a refdes rename. |
| 116877 | The controlled one shot negative edge trigger is broken. |
| 116881 | Multisim crashes when deleting and editing a component in some cases. |
| 116901 | Refdeses inside a subcircuit will reset when a part is removed that has a refdes partially matching the subcircuit's refdes. |
| 116911 | Renaming multisection component RefDes to lower case can crash Multisim in some cases. |
| 116917 | Refdes R1A in subcircuit gets renamed to R1A1 after undo action in top level design. |
| 116920 | Connect pin to net difference getting lost after un-pair then re-pair of net in back annotation dialog. |
| 116928 | Flipping a voltmeter or ammeter horizontally crashes when only one pin is connected. |
| 116939 | Multisim crashes when you perform overlapping place actions via keyboard. |
| 116957 | Back Annotation crashes Multisim in some cases after Rename/Renumber Components has been used. |
| 116959 | Selection is kept after bus lines are deleted from the Bus Settings dialog. |
| 116995 | Unable to change the sheet size of NI Elvis II Design. |
| 117003 | Copy and paste of nested subcircuits inserts invalid refdes into refdes manager. |
| 117007 | Power Factor reading from the watt meter is incorrect in some cases. |
| 117016 | Possible application crash in some cases displaying the Database Manager. |
| 117036 | ERC check is flagging NC pins as warning for unconnected pins. |
| 117054 | Undoing a delete trace action in the grapher can crash Multisim. |
| 117065 | Changing a setting in the function generator instrument during simulation inverts the duty cycle percentage. |
| 117075 | RefDes Visibility setting is ignored for power source components. |
| 117083 | Edited model is not refreshed if component properties dialog is not closed. |
| 117086 | Warning message always been prompted even if AWG and Fgen instruments are not selected to be active. |
| 117091 | Search does not work if item is previously entered in component field. |
| 117093 | Hovering over an unselected design can incorrectly return focus on an instrument property dialog. |
| 117098 | PLD HBs break the net link when used within another PLD Schematic. |
| 117099 | Simulation crashes if you change the state of the D pins while the simulation is running. |
| 117111 | Possible application crash while simulating in some cases using certain instruments. |
| 117193 | Changing visibility settings for labels using design toolbox does not mark file as dirty.. |
| 117201 | AC plots from Monte-Carlo and Worst-Case mis-label the axies. |
| 117257 | Hiding RefDes using sheet properties in a SC/HB removes the hierarchical connection information. |
| 117272 | Nets through probes fail if the wires overlap in some cases. |
| 117273 | Printing a PLD design crashes Multisim in some cases. |
| 117274 | Component renumber does not respects page ordering. |
| 117336 | Multi-page schematics should print in the order which they appear in the Design Toolbox. |
| 117379 | Copy and paste of line loses grid snap. |
| 117392 | Creating a new PLD will allow creating a PLD with an invalid name if the name ends with . |
| 117410 | Reordering the sheets doesn't change the sheet numbers in title blocks. |
| 117586 | ADA4841-1YRZ causes an internal simulation error. |
| 117610 | Clicking cancel on the Variant Manager can crash Multisim in some cases. |
| 117635 | The models for 74LS393N and 74LS393D are incorrect. |
| 117666 | Performing Worst case analysis can crash Multisim in some cases. |
| 117880 | ENERGIZING_COIL Is Not Energizing the NC_CONTACT and NO_CONTACT. |
| 117534 | Title Block Title Field Resets to File Name After Undo. |
| 117838 | Changing the net color using the Net properties dialog temporarily shows a blank color box. |
| 117901 | X is not placed on common pin of multisection component that is connected to a net after running a gate optimize operation. |
| 117790 | Digital_Frequency_Divider causes netlist error. |
| Ultiboard ( 53 ) | |
| 115709 | Importing an Orcad max file will make the component refdes a part of the footprint's name. |
| 116445 | Gate optimizer does not work for components with custom section names. |
| 112465 | Trace width are different in Ultiboard Nets Spreadsheet and Net Edit dialog. |
| 112691 | Copying and pasting a pad into the 'Custom Pad shape edit mode' does not allow you to save the shape. |
| 114327 | Deleting Open Trace Ends Causes Ultiboard to Hang in some cases. |
| 114366 | Ultiboard does not refresh preview box if selection is made in the spreadsheet view using keyboard. |
| 114375 | Gerber doesn't export the pad copper ring correctly. |
| 114545 | Clicking on Lock button toggles locked status in multiple selection situation. |
| 114582 | Locked button status does not reflect selection for Parts tab. |
| 114608 | Duplicate D-codes permitted when entering values through keyboard. |
| 114618 | Circles with a wide thickness are expanded in the Gerber file. |
| 114875 | Removing a net from a net group will revert Max via count to 2147483647. |
| 115058 | It is possible to enter invalid clearances in the group editor. |
| 115060 | Group editor component spacing values are not validated. |
| 115100 | Aperture mapping list should be sortable. |
| 115174 | Dialog should check for valid values when assinging D-Codes. |
| 115275 | Pin layer properties are not preserved when component changes board side. |
| 115321 | SVG doesn't export the pad copper ring correctly - layer settings are ignored. |
| 115370 | Part spacing DRC error indicator can be misleading sometimes. |
| 115476 | Ultiboard allows for duplicate category names in its database tree. |
| 115670 | Closing an unsaved design will close immediately and then prompt to save. |
| 115671 | Bus group drc message is cryptic. |
| 115674 | DRC errors appear inconsistently for overlapping parts. |
| 115687 | Pin and gate swapping should not use use group settings if the part is not in a group. |
| 115691 | Right clicking on checkbox for visibility shows context menu for wrong layer. |
| 115719 | Ruler bars disappear after exiting from full screen mode. |
| 115737 | Dialog box title keeps counting up after placing board outline with multiple connectors. |
| 115948 | Ultiboard crashes when opening the 3D View in some cases. |
| 116373 | Imported OrCAD File does not have Silkscreen Information. |
| 116374 | When connecting traces to vias the Assume Net field is empty in some cases. |
| 116532 | Changes made to text objects after Apply button is used doesn't get made. |
| 116549 | Changing RefDes for multi-section components in MS after a gate swap in UB does not properly update net connections. |
| 116667 | Crash exporting to NC drill while doing in-place part edit. |
| 116750 | Crash showing properties of a via placed in a CAD design. |
| 116824 | Ultiboard does not respond when moving a component attached to overlapping vias. |
| 116857 | Selection filters not correctly saved in Ultiboard. |
| 116874 | Thermal relief settings for copper areas are inverted. |
| 116896 | False positive when you separate out net and footprint change. |
| 116910 | Placing a hole causes the DXF export to generate a large file. |
| 116929 | Reference point on land patterns changes when being edited. |
| 116933 | TRIKO301812 has silkscreen overlapping pad. |
| 116944 | Editing a custom pad while placing a part crashes Ultiboard. |
| 116966 | Ultiboard can become unresponsive while trying to open certain designs. |
| 117002 | Parts without silkscreen are impervious to part shoving. |
| 117033 | Ultiboard crashes when closing an open design in some cases. |
| 117067 | Silkscreen text not selectable if copper top is grayed out. |
| 117100 | Voiding is not being performed between copper area connected to net and copper area not connected to net. |
| 117173 | Enter Coordinate dialog crashes when it looses focus and user clicks OK. |
| 117453 | Invoking board wizard after placing a test point crashes Ultiboard. |
| 117467 | Multisim and Ultiboard does not asks to Save work before closing when shutting down the computer. |
| 117479 | Wrong part is set for delete when forward annotating in some cases. |
| 117560 | Forward annotating an UltiCap file can crash Ultiboard in some cases. |
| 117719 | Back annotation wiring fails after manual pairing two resistors. |
New Components
38 Analog Devices components
| Analog Devices | |||||||
| AD737AN | ADA4817-1ARDZ | AD827JR-16 | AD736AR | AD736AQ | AD825AR-16 | AD737BQ | AD737AR |
| AD8016ARB | AD8675ARMZ | AD8504ARUZ | AD8304ARU | ADA4937-1YCPZ-R2 | AD8397ARZ | AD8397ARDZ | ADA4817-1ACPZ-R2 |
| AD8667ARZ | AD8667ARMZ | AD8675ARZ | ADA4858-3ACPZ-R2 | AD8133ACP-R2 | ADA4939-2YCPZ-R2 | ADA4855-3YCPZ-R2 | ADA4817-2ACPZ-R2 |
| ADA4939-1YCPZ-R2 | ADA4932-2YCPZ-R2 | ADA4932-1YCPZ-R2 | ADA4937-2YCPZ-R2 | AD8148ACPZ-R2 | ADA4853-3YCPZ-R2 | AD8541ARZ | AD736JNZ |
| ADA4853-2YCPZ-R2 | ADA4853-1AKSZ-R2 | AD8146ACPZ-R2 | AD8147ACPZ-R2 | ADA4853-3YRUZ | AD8145YCPZ-R2 | ||
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